The following are links to the white papers written by me (Mark Funk) and published by IBM. (These same links can be found in my LinkedIn personal page.)
- Under the Hood: Of Logical Partitions on POWER7 ... Performance implications and control of Processor Virtualization, particularly focused on the POWER 7 processor and systems architecture. The document got an outstanding review here.
- Simultaneous Multi-Tbreading on POWER7 Processors ... A performance-focused overview of the notion of Simultaneous Muilti-Threading (SMT) on POWER7 processors.
- Of NUMA on POWER7 in IBM i ... A performance discussion of the NUMA (Non-Uniform Memory Access) topology used by POWER7 processor-based systems and what the operating systems do to maximize the performance capacity available in such systems.
- Performance Implications of POWER7 Model 780's TurboCore Mode... A discussion of the performance trade-offs of using the "TurboCore" mode on POWER7 processors. Turbo-Core mode allows for a higher frequency and more cache available per core by trading off the number of cores available per POWER7 chip.
- Of GigaHertz and CPWs v2... A discussion of what all - aside from processor frequency - affects the performance capacity of POWER6 and POWER7-based systems.
- What's This Multi-Core Computing Really? ... A discussion of the performance implications of packaging multiple SMP cores within single chips, often of a multi-chip systems.
- Under the Hood: Of POWER7 Processor Caches ...A discussion of how to performance optimize a POWER7-based SMP system with knowledge of the design of its cache and cache topology.
- Wait State Cache Line Storeback ... IBM Technical Disclosure Bulletin
- Cache-Optimized Structure Supporting Global Object Locks ... IBM Technical Disclosure Bulletin
- Instruction Cache Block Touch Retro-Fitted on to Microprocessor ... IBM Technical Disclosure Bulletin